Publications

 

  • V. Porpodas and M. Cintra, CAeSaR: Unified Cluster-Assignment Scheduling and communication Reuse for clustered VLIW processorsInternational Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), Montreal, Canada, October 2013.

  • G.L. Nazar and Luigi Carro, Experimental Evaluation of an Efficient Error Detection Technique for FPGAs, European Conference on Radiation and its Effects on Components and Systems (RADECS), Biarritz, France, September, 2013.
  • G.L. Nazar and Luigi Carro,  Fast Single-FPGA Fault Injection Platform, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Austin, USA, July, 2013. Download PDF

  • S. Wong et al., Embedded Reconfigurable Computing: the ERA Approach, IEEE 11th International Conference on Industrial Informatics (INDIN), Special Session: Trends in High Performance Embedded Architectures, Bochum, Germany, July, 2013.

  • V. Porpodas, M. CintraLUCAS: Latency-adaptive Unified Cluster Assignment and Instruction Scheduling, Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Washington, USA, June 2013.

  • K. Mitropoulou, V. Porpodas, and M. Cintra, CASTED: Core-Adaptive Software Transient Error Detection for Tightly Coupled Cores, International Parallel and Distributed Processing Symposium (IPDPS), USA, May, 2013.

  • F. Anjam and S. Wong, Configurable Fault-tolerance for a Configurable VLIW Processor, 9th International Symposium on Applied Reconfigurable Computing (ARC 2013), California, USA, March, 2013. Download PDF

  • P.C. Santos, G.L. Nazar, F. Anjam, S. Wong, D. Matos, and L. Carro, A Fully Dynamic Reconfigurable NoC-based MPSoC: The Advantages of Total Reconfiguration, HiPEAC Workshop on Reconfigurable Computing (WRC 2013), Berlin, Germany, January, 2013. Download PDF

  • P.C. Santos, G.L. Nazar, F. Anjam, S. Wong, D Matos, and L. Carro, A Fully Dynamic Reconfigurable NoC-based MPSoC: The Advantages of a Multi-Level Reconfiguration, Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms (DITAM 2013), Berlin, Germany, January, 2013. Download PDF

  • P.C. Santos, G.L. Nazar, F. Anjam, S. Wong, and L. Carro, Adapting Communication for Adaptable Processors: A Multi-Axis Reconfiguration Approach, International Conference on ReConFigurable Computing and FPGAs (ReConFig 2012), Cancun, Maxico, December, 2012. Download PDF

  • ERA et al., Embedded Reconfigurable Architectures, International conference on Compilers, architectures and synthesis for embedded systems (CASES '12), ACM New York, USA,  September, 2012.
  • V. Porpodas and M. Cintra, Unified Cluster Assignment, Instruction Scheduling, and Fast Frequency Selection for Heterogeneous Clustered VLIW Cores , International Workshop on Languages and Compilers for Parallel Computing (LCPC), Japan, September, 2012. Download PDF

  • V. Spiliopoulos , A. Sembrant , S. Kaxiras, A Tool for Investigating your Program’s Power Behaviour, IEEE 20th International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems, 7-9 August, 2012. Download PDF
  • K. Cai et al., Dynamically Reconfiguring through Phase Detection on FPGA, ACACES 2012 eight International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems, Fiuggi, Italy, July 2012.

  • F. Anjam, L. Carro, S. Wong, G.L. Nazar, and M.B. Rutzig, Simultaneous Reconfiguration of Issue-width and Instruction Cache for a VLIW Processor, International Conference on Embedded Computer Systems: Architecture Modeling and Simulation (IC-SAMOS 2012), July, 2012. Download PDF

  • G. Keramidas, C. Datsios, and S. Kaxiras, A Framework for Efficient Cache Resizing,  International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, 16-19 July 2012. Download PDF

  • G.L. Nazar and Luigi Carro, Fast Error Detection Through Efficient Use of Hardwired Resources in FPGAs, 17th IEEE European Test Symposium (ETS), 2012, Annecy, Los Alamitos: IEEE Computer Society Press, 2012, May 2012. Download PDF

  • F. Anjam, Q. Kong, R.A.E. Seedorf, and S. Wong, A Run-time Task Migration Scheme for an Adjustable Issue-slots Multi-core Processor, 8th International Symposium on Applied Reconfigurable Computing (ARC 2012), March, 2012. Download PDF

  • C. Antonopoulos, C. Panagiotou, G. Keramidas, S. Koubias, Network Driven Cache Behavior in Wireless Sensor NetworksIEEE International Conference on Industrial Technology (ICIT), Greece, 19-21 March 2012. Download PDF

  • R.A.E. Seedorf, F. Anjam, A.A.C. Brandon, and S. Wong, Design of a Pipelined and Parameterized VLIW Processor: r-VEX v.2, 6th HiPEAC Workshop on Reconfigurable Computing (WRC 2012), January, 2012. Download PDF

  • F. Anjam, Q. Kong, R.A.E. Seedorf, and S. Wong, On the Implementation of Traps for a Softcore VLIW processor, 6th HiPEAC Workshop on Reconfigurable Computing (WRC 2012), January, 2012. Download PDF

  • F. Anjam, M. Nadeem, and S. Wong, Targeting Code Diversity with Run-time Adjustable Issueslots in a Chip Multiprocessor, Design, Automation and Test in Europe Conference (DATE), Grenoble, France, pp. 1-6, March, 2011. Download PDF

  • L. Sterpone, L. Carro, D. Matos, S. Wong, and F. Anjam, A New Reconfigurable Clock-Gating Technique for Low Power SRAM-based FPGAs, Design Automation and Test in Europe (DATE), Grenoble, France, pp. 752-757, 2011. Download PDF

  • A. Kologeski, C. Concatto, L. Carro, and F.G. Kastensmidt, Improving reliability in NOCs by application-specific mapping combined with adaptive fault-tolerant methods in the links, IEEE European Test Symposium (ETS), IEEE Computer Society, Trondheim, Noruega, USA, PP. 123-128, 2011. Download PDF

  • C. Concatto, A. Kologeski, L. Carro, F.G. Kastensmidt, G. Palermo, C. Silvano, Two-levels of adaptive buffer for virtual channel router in NoCs, IFIP/IEEE International Conference on Very large integartion and SoC (VLSI-SOC), IEEE Computer Society, Los Alamitos, CA, Hong Kong, pp. 302-307, 2011. Download PDF

  • S. Wong, et al., ERA - Embedded Reconfigurable Architectures, Chapter 5 in Reconfigurable Computing - From FPGAs to Hardware/Software Codesign, pp. 239--260, Springer, ISBN: 978-1-4614-0060-8, August 2011. Download PDF

  • D. Matos, C. Concatto, A. Kologeski, L. Carro, K. Kreutz, K. Marcio, S. Fernanda, and Altamiro, A NOC closed-loop performance monitor and adapter, Journal of Microprocessors and Microsystems, vol. 10, pp. 1016, 2011. Download PDF
  • D. Matos, C. Concatto, M.  Kreutz, F. Kastensmidt, L. Carro, and A. Susin, Reconfigurable Routers for Low Power and High Performance, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Print), vol. 19, issue 11, PP. 2045-2057, 2011. Download PDF

  • V. Spiliopoulos1, G. Keramidas, S. Kaxiras1, and K. Efstathiou, Power-Performance Adaptation in Intel Core i7, Computer Architectures and Operating Systems Workshop(CAOS-2), HiPEAC, Crete, Greece, 2011. Download PDF
  • Z. Yu, N. Puzovic, A. Portero, and R. Giorgi, Characterizing Phase Behavior for Dynamically Reconfigurable Architectures,  International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES), Fiuggi, Italy, 10-16 july, 2011. Download PDF

  • S. Wong, A. Brandon, F. Anjam, R. Seedorf, R. Giorgi, Z. Yu, N. Puzovic, S.A. McKee, M. Själander, G. Keramidas, and L. Carro, Early Resultsfrom ERAEmbedded Reconfigurable Architectures, IEEE International Conference on Industrial Informatics (INDIN), Caparica, Lisbon, Portugal,  PP. 816-822, 26-29 July, 2011. Download PDF

  • D. Mattos, and L. Carro, Monitor-Adapter Coupling for NOC Performance Tuning, International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), Samos, Greece, pp. 193199, 19–22 July, 2010. Download PDF

  • M.B.C. Alioto, P. Bennati, and R. Giorgi, Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed, IEEE International Symposium On Circuits and Systems (ISCAS), Paris, France, pp. 37-40, May 2010. Download PDF
  • N.S. Puzovicì, R. McKee, A. Eres, P. Zaks, Gai, S. Wong, and R. Giorgi, A Multi-pronged Approach to Benchmark Characterization, IEEE International Conference on Cluster Computing Workshops and Posters (ICCC), pp. 1-4, 20-24 September, 2010. Download PDF

  • ERA et al., ERA – Embedded Reconfigurable Architectures, Book Chapter in, Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, edited by Joao Cardoso and Michael Hubner, Hardcover: 300 pages, ISBN-10: 1461400600, ISBN-13: 978-1461400608, pp. 239-259, September, 2011.

  • S. Wong, F. Anjam, and M.F. Nadeem, Dynamically Reconfigurable Register File for a Softcore VLIW Processor,  Design, Automation and Test in Europe Conference (DATE), Dresden, Germany, March, 2010. Download PDF

  • F. Anjam, S. Wong, and M.F. Nadeem, A Shared Reconfigurable VLIW Multiprocessor System, Reconfigurable Architecture Workshop (RAW), Atlanta, Georgia, USA, April, 2010. Download PDF

  • F. Anjam, M. Nadeem, and S. Wong, A VLIW Softcore Processor with Dynamically Adjustable Issue-slots, International Conference on Field-Programmable Technology (FPT), Beijing, China, December, 2010. Download PDF

  • F. Anjam, S. Wong, and M.F. Nadeem, A Multiported Register File with Register Renaming for Configurable Softcore VLIW Processors, International Conference on Field Programmable Technology (FPT), Beijing, China, December, 2010. Download PDF

  • B. Goel, S.A. McKee, R. Gioiosa, K. Singh, M. Bhadauria, and M. Cesati, Portable, Scalable per-Core Power Estimation for Intelligent Resource Management, IEEE International Green Computing Conference (IGCC), Chicago, USA, PP. 135-146, 15-18 August, 2010. Download PDF

  • G. Keramidas, V. Spiliopoulos, and S. Kaxiras, Interval Based Models for Run-Time DVFS Orchestration in SuperScalar Processors,ACM International Conference on Computing Frontiers (CF), Bertinoro, Italy, pp. 287-296, May 17-19, 2010. Download PDF

  • G. Keramidas, P. Petoumenos, and S. Kaxiras,Where Replacement Algorithms Fail: a Thorough Analysis, ACM International Conference on Computing Frontiers (CF), Bertinoro, Italy, pp. 141-150, May 17-19, 2010. Download PDF

  • P. Petoumenos, G. Keramidas, and S. Kaxiras, Instruction-based Reuse-Distance Replacement Policy,Cache Replacement Championship Workshop in conjunction with ISCA, Saint-Malo, France, 2010. Download PDF

  • Debora Matos, Miklecio Costa, Luigi Carro, and Altamiro Amadeu Susin, Network Interface to Synchronize Multiple Packets on NoC-based Systems-on-Chip, VLSI-SoC, Madrid, Spain, pp. 31-36, 27-29 September, 2010 . Download PDF

  • R. Giorgi and S. Wong, WRC'10: Proceedings of 2010 Workshop on Reconfigurable Computing, TU-Delft / EWI Computer Enginnering Laboratory, ISBN:978-90-72298-05-8, Delft, The Netherlands, pp. 1-116, January 2010.